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  copyright ? 2000 rev. 1.6 4/00 for further information call (714) 898-8121 11861 w estern a venue , g arden g rove , ca. 92841 1 c urrent m ode pwm c ontroller p roduction d ata s heet t he i nfinite p ower of i nnovation sg1842/sg1843 series lin d oc #: 1842 description key features  optimized for off-line control  low start-up current (<1ma)  automatic feed forward compensation  trimmed oscillator discharge current  pulse-by-pulse current limiting  enhanced load response characteristics  under-voltage lockout with 6v hysteresis (sg1842 only)  double-pulse suppression  high-current totem-pole output (1amp peak)  internally trimmed bandgap reference  500khz operation  undervoltage lockout sg1842 - 16 volts sg1843 - 8.4 volts  low shoot-through current <75ma over temperature the sg1842/43 family of control ic's provides all the necessary features to implement off-line fixed frequency, current-mode switching power supplies with a minimum number of external components. current-mode architecture demonstrates improved line regulation, improved load regulation, pulse-by-pulse current limiting and inherent protection of the power supply output switch. the bandgap reference is trimmed to 1% over temperature. oscillator discharge current is trimmed to less than 10%. the sg1842/43 has under- product highlight package order information t a (c) 0 to 70 sg3842m SG3842N sg3842dm sg3842d sg3842y sg3842j sg3843m sg3843n sg3843dm sg3843d sg3843y sg3843j -25 to 85 sg2842m sg2842n sg2842dm sg2842d sg2842y sg2842j sg2843m sg2843n sg2843dm sg2843d sg2843y sg2843j -55 to 125 sg1842y sg1842j sg1842l sg1843y sg1843j sg1843l mil-std/883 sg1842y/883b sg1842j/883b sg1842l/883b sg1843y/883b sg1843j/883b sg1843l/883b desc sg1842y/desc sg1842j/desc sg1842f/desc sg1842l/desc sg1843y/desc sg1843j/desc sg1843f/desc sg1843l/desc t ypical a pplication of sg3842 i n a f lyback c onverter high reliability features  available to mil-std-883b and desc smd  scheduled for mil-m38510 qpl listing  radiation data available  linfinity level "s" processing available note: all surface-mount packages are available in tape & reel. voltage lockout, current limiting circuitry and start-up current of less than 1ma. the totem-pole output is optimized to drive the gate of a power mosfet. the output is low in the off state to provide direct interface to an n channel device. the sg1842/43 is specified for operation over the full military ambient temperature range of -55c to 125c. the sg2842/43 is specified for the industrial range of -25c to 85c, and the sg3842/43 is designed for the commercial range of 0c to 70c. plastic dip 8-pin m plastic dip 14-pin n plastic soic 8-pin dm plastic soic 14-pin d ceramic dip 8-pin y ceramic dip 14-pin j cer. flatpack 10-pin f ceramic lcc 20-pin l ac input sg3842 r st i st v cc
c urrent -m ode pwm c ontroller sg1842/sg1843 series product databook 1996/1997 copyright ? 2000 rev. 1.6 4/00 2 p roduction d ata s heet absolute maximum ratings (notes 1 & 2) supply voltage (i cc < 30ma) ............................................................... self limiting supply voltage (low impedance source) ........................................................ 30v output current (peak) ....................................................................................... 1a output current (continuous) ....................................................................... 350ma output energy (capacitive load) ....................................................................... 5j analog inputs (pins 2, 3) ................................................................. -0.3v to +6.3v error amp output sink current ..................................................................... 10ma power dissipation at t a = 25c (dil-8) ............................................................ 1w operating junction temperature hermetic (j, y, f, l packages) ................................................................... 150c plastic (n, m, d, dm packages) ................................................................ 150c storage temperature range .......................................................... -65c to +150c lead temperature (soldering, 10 seconds) .................................................. 300c package pin outs v ref v cc output gnd comp v fb i sense r t /c t 1 8 27 36 45 m & y package (top view) dm package (top view) v ref v cc output gnd comp v fb i sense r t /c t 1 8 27 36 45 v ref n.c. v cc v c output gnd pwr gnd comp n.c. v fb n.c. i sense n.c. r t /c t 1 14 213 312 411 510 69 78 d package (top view) m package: thermal resistance-junction to ambient, ja 95c/w n package: thermal resistance-junction to ambient, ja 65c/w dm package: thermal resistance-junction to ambient, ja 165c/w d package: thermal resistance-junction to ambient, ja 120c/w y package: thermal resistance-junction to ambient, ja 130c/w j package: thermal resistance-junction to ambient, ja 80c/w f package: thermal resistance-junction to case, jc 80c/w thermal resistance-junction to ambient, ja 145c/w l package: thermal resistance-junction to case, jc 35c/w thermal resistance-junction to ambient, ja 120c/w junction temperature calculation: t j = t a + (p d x ja ). the ja numbers are guidelines for the thermal performance of the device/pc-board system. all of the above assume no ambient airflow. thermal data note 1. exceeding these ratings could cause damage to the device. note 2. all voltages are with respect to pin 5. all currents are positive into the specified terminal. 1 14 213 312 411 510 69 78 j & n package (top view) comp n.c. v fb n.c. i sense n.c. r t /c t v ref n.c. v cc v c output ground power gnd f package (top view) 10.v ref 9. v cc 8. v c 7. output 6. gnd 1. comp 2. v fb 3. i sense 4. r t /c t 5. power gnd 1 10 29 38 47 56 l package (top view) 32 4 5 6 7 8 911 10 1. n.c. 2. comp 3. n.c. 4. n.c. 5. v fb 6. n.c. 7. i sense 8. n.c. 9. n.c. 10. r t /c t 12019 18 17 16 15 14 12 13 11. n.c. 12. ground 13. n.c. 14. n.c. 15. output 16. n.c. 17. v cc 18. n.c. 19. n.c. 20. v ref
c urrent -m ode pwm c ontroller sg1842/sg1843 series product databook 1996/1997 3 copyright ? 2000 rev. 1.6 4/00 p roduction d ata s heet electrical characteristics (unless otherwise specified, these specifications apply over the operating ambient temperatures for sg1842/sg1843 with -55c t a 125c, sg2842/ sg2843 with -25c t a 85c, sg3842/sg3843 with 0c t a 70c, v cc = 15v (note 7), r t = 10k ? , and c t = 3.3nf. low duty cycle pulse testing techniques are used which maintains junction and case temperatures equal to the ambient temperature.) reference section parameter symbol test conditions output voltage t j = 25c, i o = 1ma line regulation 12 v in 25v load regulation 1 i o 20ma temperature stability (note 4) total output variation (note 4) line, load, temp. output noise voltage (note 4) v n 10hz f 10khz, t j = 25c long term stability (note 4) t a = 125c, 1000hrs output short circuit sg3842/43 units min. typ. max. min. typ. max. min. typ. max. sg2842/43 4.95 5.00 5.05 4.95 5.00 5.05 4.90 5.00 5.10 v 620 620 620 mv 625 625 625 mv 0.2 0.4 0.2 0.4 0.2 0.4 mv/c 4.90 5.10 4.90 5.10 4.82 5.18 v 50 50 50 v 525 525 525 mv -30 -100 -180 -30 -100 -180 -30 -100 -180 ma oscillator section initial accuracy t j = 25c voltage stability 12 v cc 25v temperature stability (note 4) t min t a t max amplitude v rt/ct (peak to peak) discharge current t j = 25c t min t a t max error amp section input voltage v comp = 2.5v input bias current open loop gain a vol 2 v o 4v unity gain bandwidth (note 4) t j = 25c power supply rejection ratio psrr 12 v cc 25v output sink current v vfb = 2.7v, v comp = 1.1v output source current v vfb = 2.3v, v comp = 5v v out high v vfb = 2.3v, r l = 15k to gnd v out low v vfb = 2.7v, r l = 15k to v ref sg1842/43 47 52 57 47 52 57 47 52 57 khz 0.2 1 0.2 1 0.2 1 % 555% 1.7 1.7 1.7 v 7.8 8.3 8.8 7.5 8.4 9.3 7.5 8.4 9.3 ma 7.0 9.0 7.2 9.5 7.2 9.5 ma 2.45 2.50 2.55 2.45 2.50 2.55 2.42 2.50 2.58 v -0.3 -1 -0.3 1 -0.3 -2 a 65 90 65 90 65 90 db 0.7 1 0.7 1 0.7 1 mhz 60 70 60 70 60 70 db 26 26 26 ma -0.5 -0.8 -0.5 -0.8 -0.5 -0.8 ma 56 56 56 v 0.7 1.1 0.7 1.1 0.7 1.1 v supply voltage range output current (peak) output current (continuous) analog inputs (pin 2, pin 3) error amp output sink current oscillator frequency range oscillator timing resistor r t oscillator timing capacitor c t operating ambient temperature range: sg1842/43 sg2842/43 sg3842/43 recommended operating conditions (note 3) parameter symbol units recommended operating conditions min. typ. max. 30 v 1 a 200 ma 02.6v 5ma 0.1 500 khz 0.52 150 k ? 0.001 1.0 f -55 125 c -25 85 c 070c note 3. range over which the device is functional. (electrical characteristics continue next page.)
c urrent -m ode pwm c ontroller sg1842/sg1843 series product databook 1996/1997 copyright ? 2000 rev. 1.6 4/00 4 p roduction d ata s heet electrical characteristics (cont'd.) under-voltage lockout section parameter symbol test conditions start threshold 1842 1843 min. operation voltage after turn-on 1842 1843 pwm section maximum duty cycle minimum duty cycle power consumption section start-up current operating supply current v fb = v isense = 0v v cc zener voltage i cc = 25ma notes: 4. these parameters, although guaranteed, are not 100% tested in production. 5. parameter measured at trip point of latch with v vfb = 0. sg3842/43 units min. typ. max. min. typ. max. min. typ. max. sg2842/43 15 16 17 15 16 17 14.5 16 17.5 v 7.8 8.4 9.0 7.8 8.4 9.0 7.8 8.4 9.0 v 9 10 11 9 10 11 8.5 10 11.5 v 7.0 7.6 8.3 7.0 7.6 8.2 7.0 7.6 8.2 v sg1842/43 93 95 100 90 95 100 90 95 100 % 000% 0.5 1 0.5 1 0.5 1 ma 11 17 11 17 11 17 ma 34 34 34 v 6. gain defined as: a = ; 0 v isense 0.8v. 7. adjust v cc above the start threshold before setting at 15v. output low level i sink = 20ma i sink = 200ma output high level i source = 20ma i source = 200ma rise time t j = 25c, c l = 1nf fall time t j = 25c, c l = 1nf current sense section gain (notes 5 & 6) maximum input signal (note 5) v comp = 5v power supply rejection ratio (note 5) psrr 12 v cc 25v input bias current delay to output (note 4) output section 2.85 3 3.15 2.85 3 3.15 2.85 3 3.15 v/v 0.9 1 1.1 0.9 1 1.1 0.9 1 1.1 v 70 70 70 db -2 -10 -2 -10 -2 -10 a 150 300 150 300 150 300 ns 0.1 0.4 0.1 0.4 0.1 0.4 v 1.5 2.2 1.5 2.2 1.5 2.2 v 13 13.5 13 13.5 13 13.5 v 12 13.5 12 13.5 12 13.5 v 50 150 50 150 50 150 ns 50 150 50 150 50 150 ns ? v comp ? v isense
c urrent -m ode pwm c ontroller sg1842/sg1843 series product databook 1996/1997 5 copyright ? 2000 rev. 1.6 4/00 p roduction d ata s heet block diagram * - v cc and v c are internally connected for 8 pin packages. ** - power ground and ground are internally connected for 8 pin packages. oscillator s r v ref good logic internal bias s / r 5v ref pwm latch current sense comparator 1v r 2r error amp uvlo 34v ground** v cc * r t /c t v fb comp current sense power ground** output v c * v ref 5.0v 50ma 16v (1842) 8.4v (1843) 6v (1842) 0.8v (1843) 2.5v
c urrent -m ode pwm c ontroller sg1842/sg1843 series product databook 1996/1997 copyright ? 2000 rev. 1.6 4/00 6 p roduction d ata s heet graph / curve index characteristic curves figure # 1. dropout voltage vs. temperature 2. oscillator temperature stability 3. current sense to output delay vs. temperature 4. output duty cycle vs. temperature 5. start-up current vs. temperature 6. reference voltage vs. temperature 7. start-up voltage threshold vs. temperature 8. start-up voltage threshold vs. temperature 9. oscillator discharge current vs. temperature 10. output saturation voltage vs. output current and temperature (sink transistor) 11. current sense threshold vs. error amplifier output 12. output saturation voltage vs. output current and temperature (source transistor) figure index application information figure # 13. oscillator timing circuit 14. oscillator frequency vs. r t for various c t typical applications section figure # 15. current sense spike suppression 16. mosfet parasitic oscillations 17. bipolar transistor drive 18. isolated mosfet drive 19. adjustable buffered reduction of clamp level with softstart 20. external duty cycle clamp and multi-unit synchronization 21. oscillator connection 22. error amplifier connection 23. slope compensation 24. open loop laboratory fixture 25. off-line flyback regulator
c urrent -m ode pwm c ontroller sg1842/sg1843 series product databook 1996/1997 7 copyright ? 2000 rev. 1.6 4/00 p roduction d ata s heet characteristic curves figure 2. ? oscillator temperature stability figure 3. ? current sense to output delay vs. temperature figure 4. ? output duty cycle vs. temperature figure 1. ? dropout voltage vs. temperature junction temperature - ( c) frequency drift - (%) -10 -75 -50-25 0 255075100125 -8 -6 -4 -2 0 v in = 15v duty cycle = 50% 2 junction temperature - ( c) minimum operating voltage - (v) 8.0 -75 -50-25 0 255075100125 8.4 8.8 9.2 9.6 10.0 sg1842 sg1843 junction temperature - ( c) current sense delay - (ns) 120 -75 -50-25 0 255075100125 140 160 180 200 220 v pin3 = 1.1v junction temperature - ( c) output duty cycle - (%) 44 -75 -50-25 0 255075100125 45 46 47 50 49 48 50khz 100khz 200khz 50khz 200khz 100khz
c urrent -m ode pwm c ontroller sg1842/sg1843 series product databook 1996/1997 copyright ? 2000 rev. 1.6 4/00 8 p roduction d ata s heet characteristic curves figure 6. ? reference voltage vs. temperature figure 7. ? start-up voltage threshold vs. temperature figure 8. ? start-up voltage threshold vs. temperature figure 5. ? start-up current vs. temperature junction temperature - ( c) reference voltage - (v) 4.98 -75 -50-25 0 255075100125 v cc = 15v 4.99 5.00 5.01 5.02 junction temperature - ( c) start-up current - (ma) 0.2 -75 -50-25 0 255075100125 0.3 0.4 0.5 0.6 0.7 sg1842 sg1843 junction temperature - ( c) reference voltage - (v) 8.18 -75 -50-25 0 255075100125 sg1843 8.22 8.26 8.30 8.32 8.20 8.24 8.28 junction temperature - ( c) start up voltage - (v) 16.00 -75 -50-25 0 255075100125 sg1842 16.02 16.04 16.06 16.08 15.98
c urrent -m ode pwm c ontroller sg1842/sg1843 series product databook 1996/1997 9 copyright ? 2000 rev. 1.6 4/00 p roduction d ata s heet characteristic curves figure 10. ? output saturation voltage vs. output current & temperature figure 11. ? current sense threshold vs. error amplifier output figure 12. ? output saturation voltage vs. output current & temperature figure 9. ? oscillator discharge current vs. temperature output current - (ma) saturation voltage - (v) 0.5 100 200 300 400 500 1.0 1.5 2.0 2.5 0 -55c +25c +125c v in = 15v duty cycle < 5% junction temperature - ( c) oscillator discharge current - (ma) 7.4 -75 -50-25 0 255075100125 7.6 7.8 8.0 8.2 7.2 error amp output voltage - (v) current sense threshold - (v) 0.2 1.0 2.0 3.0 4.0 5.0 0.4 0.6 0.8 1.0 0 0.1 0.3 0.5 0.7 0.9 125 c 25 c -55 c output current - (ma) saturation voltage - (v) 1.0 100 200 300 400 500 2.0 3.0 4.0 0 v in = 15v duty cycle < 5% -55 c +25 c +125 c +125 c +25 c
c urrent -m ode pwm c ontroller sg1842/sg1843 series product databook 1996/1997 copyright ? 2000 rev. 1.6 4/00 10 p roduction d ata s heet application information oscillator the oscillator of the 1842/43 family of pwm's is designed such that many values of r t and c t will give the same oscillator frequency, but only one combination will yield a specific duty cycle at a given frequency. figure 13 ? oscillator timing circuit a set of formulas are given to determine the values of r t and c t for a given frequency and maximum duty cycle. (note: these formulas are less accurate for smaller duty cycles or higher frequencies. this will require trimming of r t or c t to correct for this error.) given: frequency f maximum duty cycle d m calculate: r t = 267 ( ? ) where .3 < d m < .95 c t = (f) for duty-cycles above 95% use: example: a flyback power supply requires a maximum of 45% duty cycle at a switching frequency of 50khz. what are the values of r t and c t ? given: f = 50khz d m = 0.45 calculate: r t = 267 = 674 ? c t = = .025f (1.76) 1/.045 -1 (1.76) .55/.45 - 1 ? ? ? ? ? ? 1.86 * 0.45 50000 * 674 (1.76) 1/d m -1 (1.76) (1-d m )/d m - 1 ? ? ? ? ? ? 1.86 * d m f * r t v ref r t /c t gnd r t c t .001 1 c t value - (f) 1000 f - (khz) .002 .02 100 10 .005 .01 .05 0.1 r t = 680 r t = 2k r t = 5k r t = 10k r t = 20k r t = 30k r t = 50k r t = 70k r t = 100k figure 14 ? oscillator frequency vs. r t for various c t f where r t 5k ? 1.86 r t c t
c urrent -m ode pwm c ontroller sg1842/sg1843 series product databook 1996/1997 11 copyright ? 2000 rev. 1.6 4/00 p roduction d ata s heet typical application circuits figure 18. ? isolated mosfet drive figure 17. ? bipolar transistor drive current transformers can be used where isolation is required between pwm and primary ground. a drive transformer is then necessary to interface the pwm output with the mosfet. the 1842/43 output stage can provide negative base current to remove base charge of power transistor (q 1 ) for faster turn off. this is accomplished by adding a capacitor (c 1 ) in parallel with a resistor (r 1 ). the resistor (r 1 ) is to limit the base current during turn on. pin numbers referenced are for 8-pin package and pin numbers in parenthesis are for 14-pin package. figure 15. ? current-sense spike suppression figure 16. ? mosfet parasitic oscillations a resistor (r 1 ) in series with the mosfet gate reduce overshoot and ringing caused by the mosfet input capacitance and any induc- tance in series with the gate drive. (note: it is very important to have a low inductance ground path to insure correct operation of the i.c. this can be done by making the ground paths as short and as wide as possible.) the rc low pass filter will eliminate the leading edge current spike caused by parasitics of power mosfet. v cc v in 7 (12) 7 (11) 6 (10) 5 (8) 3 (5) r c r s q1 i pk i pk(max) = 1.0v r s sg1842/43 v in v cc 7 (12) 7 (11) 6 (10) 5 (8) r s q1 sg1842/43 3 (5) r 1 sg1842/43 3 (5) 5 (8) 6 (10) 7 (11) r s q1 v c1 c 1 r 1 r 2 v in v c i b + v c r 2 v c1 r 1 || r 2 i pk = v (pin 1) - 1.4 3r s n p n s ? ? ? ? ? ?
c urrent -m ode pwm c ontroller sg1842/sg1843 series product databook 1996/1997 copyright ? 2000 rev. 1.6 4/00 12 p roduction d ata s heet typical application circuits (continued) figure 20. ? external duty cycle clamp and multi-unit synchronization figure 19. ? adjustable buffered reduction of clamp level with softstart precision duty cycle limiting as well as synchronizing several 1842/ 1843's is possible with the above circuitry. softstart and adjustable peak current can be done with the external circuitry shown above. t softstart = -ln 1 - c where; v eao voltage at the error amp output under minimum line and maximum load conditions. i pk = where: v cs = 1.67 and v c.s.max = 1v (typ.) 7 (12) 6 (10) 7 (11) 5 (8) 3 (5) sg1842/43 v cc v in q1 i v cs r s 5 (9) 8 (14) 4 (7) 2 (3) 1 (1) mpsa63 r 2 r 1 1n4148 c 2 6 r b r a 1 84 3 555 timer 4 (7) 5 (9) 8 (14) sg1842/43 to other sgx842/43 ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? figure 22. ? error amplifier connection figure 21. ? oscillator connection 8 (14) 4 (7) 5v c t 2.8v 1.1v sg1842/43 discharge current i d = 8.2ma r t 1 (1) r f r i 2 (3) r f 10k 2.5v sg1842/43 0.5m a the oscillator is programmed by the values selected for the timing components r t and c t . refer to application information for calculation of the component values. error amplifier is capable of sourcing and sinking current up to 0.5ma. r 1 r 2 r 1 +r 2 v eao - 1.3 5 r 1 r 1 +r 2 r 1 r 1 +r 2 f = (r a + 2r b )c 1.44 f = r a + 2r b r b v cs r s
c urrent -m ode pwm c ontroller sg1842/sg1843 series product databook 1996/1997 13 copyright ? 2000 rev. 1.6 4/00 p roduction d ata s heet typical application circuits (continued) figure 23. ? slope compensation high-peak currents associated with capacitive loads necessitate careful grounding techniques. timing and bypass capacitors sho uld be connected to pin 5 in a single point ground. the transistor and 5k potentiometer are used to sample the oscillator waveform an d apply an adjustable ramp to pin 3. due to inherent instability of current mode converters running above 50% duty cycle, a slope compensation should be added to either current sense pin or the error amplifier. figure 23 shows a typical slope compensation technique. oscillator v ref good logic s r 5v ref internal bias 8(14) 4(7) 2(3) 1(1) r f c f r d r i from v o r slope 2n222a r t 5v uvlo 2.5v error amp c t 1v 2r r c.s. comp pwm latch 5(9) 3(5) 5(8) cr s r 6(10) 7(11) 7(12) v cc v o q1 sg1842/43 v in 5v figure 24. ? open loop laboratory fixture 2 3 4 8 7 6 5 comp v fb i sense r t c t v ref v cc output ground 0.1f 0.1f a sg1842/43 r t 2n2222 100k 4.7k 1k 4.7k 5k i sense adjust error amp a djust c t 1k groun d output v cc v ref 1
c urrent -m ode pwm c ontroller sg1842/sg1843 series product databook 1996/1997 copyright ? 2000 rev. 1.6 4/00 14 p roduction d ata s heet typical application circuits (continued) figure 25. ? off-line flyback regulator 150k 100pf v fb comp v ref r t /c t 4700f 10v 5v 2-5 a isolation boundary 0.01pf 400v 1n3613 820pf 2.5k 1n3613 ufn432 27 0.01f 10f 20v 1n3613 1k 470pf 0.85 usd 735 ti 220f 250v 4.7 1w 673-3 ac input v cc out cur sen gnd sg1842 20k 3.6k 10k .0047f 0.01f 16v 56k 1w 20k t1: coilcraft e - 4140 - b primary - 97 turns single awg 24 secondary - 4 turns 4 parallel awg 22 control - 9 turns 3 parallel awg 28 specifications input line voltage: 90vac to 130vac input frequency: 50 or 60hz switching frequency: 40khz 10% output power: 25w maximum output voltage: 5v +5% output current: 2 to 5a line regulation: 0.01%/v load regulation: 8%/a* efficiency @ 25 watts, v in = 90vac: 70% v in = 130vac: 65% output short-circuit current: 2.5amp average * this circuit uses a low-cost feedback scheme in which the dc voltage developed from the primary-side control winding is sensed by the sg1842 error amplifier. load regulation is therefore dependent on the coupling between secondary and control windings, and on transformer leakage inductance.


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